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using regulated supply description the A1230 is a dual-channel, bipolar switch with two hall- effect sensing elements, each providing a separate digital output for speed and direction signal processing capability. the hall elements are photolithographically aligned to better than 1 m. maintaining accurate mechanical location between the two active hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. the A1230 is a highly sensitive, temperature stable magnetic sensing device ideal for use in ring magnet based, speed and direction systems located in harsh automotive and industrial environments. the A1230 monolithic integrated circuit (ic) contains two independent hall-effect bipolar switches located 1 mm apart. the digital outputs are out of phase so that the outputs are in quadrature when interfaced with the proper ring magnet design. this allows easy processing of speed and direction signals. extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal quadrature. the allegro ? patented, high-frequency chopper-stabilization technique cancels offsets in each channel providing stable operation over the full specified temperature and voltage ranges. additionally, the high-frequency chopping circuits allow an increased analog signal-to-noise ratio at the input of the digital A1230ds, rev. 1 features and benefits ? two matched hall effect switches on a single substrate ? 1 mm hall element spacing ? superior temperature stability and industry-leading jitter performance through use of advanced chopper- stabilization topology ? integrated regulator provides 3.3 v operation ? integrated esd protection from outputs and vcc to ground ? high sensitivity switchpoints ? robust structure for emc protection ? solid-state reliability ? reverse battery protection on supply and both output pins ultra-sensitive dual-channel quadrature hall-effect bipolar switch continued on the next page? typical application not to scale A1230 packages: 8-pin soic (suffix l), and 4-pin sip (suffix k) 1 A1230 2 3 4 v supply 0.1 f v outputb v outputa outputa outputb gnd vcc 100 7 a a resistor is optional depending on conducted immunity requirements
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 2 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com comparators internal to the ic. as a result, the A1230 achieves industry-leading digital output jitter performance that is critical in high performance motor commutation applications. an on-chip regulator allows the use of this device over a wide operating voltage range. post-assembly factory programming at allegro provides sensitive switchpoints that are symmetrical between the two switches. the A1230 is available in a plastic 8-pin soic surface mount package (l) and a plastic 4-pin sip (k). both are available in a temperature range of ?40c to 150c. each package is lead (pb) free, with 100% matte tin plated leadframe. description (continued) absolute maximum ratings characteristic symbol notes rating units supply voltage v cc 26.5 v reverse battery voltage v rcc ?16 v output off voltage v output v cc v output sink current i output(sink) internally limited ? magnetic flux density b unlimited ? operating ambient temperature t a range l ?40 to 150 oc maximum junction temperature t j (max) 165 oc storage temperature t stg ?65 to 170 oc selection guide part number packing* mounting ambient, t a A1230lk-t bulk, 98 pieces/bag 4-pin sip through hole ?40oc to 150oc A1230lltr-t 13-in. reel, 3000 pieces/reel 8-pin soic surface mount *contact allegro for additional packing options.
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 3 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com functional block diagram pin-out diagrams 1 2 3 4 package l package k terminal list table pin number name function package k package l 1 1 vcc connects power supply to on-chip voltage regulator 2 2 outputa output from e1 via rst schmitt circuit 3 3 outputb output from e2 via second schmitt circuit 4 4 gnd terminal for ground connection ? 5-8 nc no connection 8 7 6 5 1 2 3 4 amp output drive amp output drive 2 bit 2 bit regulator programmable trim outputa channel a channel b outputb vcc 4 bit dynamic offset cancellation dynamic offset cancellation pass filter low- pass filter low- gnd hall element e1 hall element e2 low noise signal recovery low noise signal recovery
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 4 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com operating characteristics valid over operating temperature ranges unless otherwise noted; typical data applies to v cc = 12 v, and t a = 25oc characteristic symbol test conditions min. typ. max. unit 1 electrical characteristics supply voltage 2 v cc operating; t a 150c 3.3 ? 18 v output leakage current i output(off) either output ? < 1 10 a supply current i cc(off) b < b rp(a) ,b < b rp(b) ? 3.5 6.0 ma i cc(on) b > b op(a) ,b > b op(b) ? 4.5 6.0 ma low output voltage v output(on) both outputs; i output(sink) = 20 ma; b > b op(a) , b > b op(b) ? 160 500 mv output sink current i output(sink) ? ? 20 ma output sink current, continuous 3 i output(sink)c t j < t j(max) ,v output = 12 v ? ? 70 ma output sink current, peak 4 i output(sink)p t < 3 seconds ? ? 220 ma chopping frequency f c ? 780 ? khz output rise time t r c load = 20 pf, r load = 820 ? 1.8 ? s output fall time t f c load = 20 pf, r load = 820 ? 1.2 ? s power-on time t on b > 40 g or b < ?40 g ? 15 ? s power-off time t off b > 40 g or b < ?40 g ? 25 ? s power-on state pos b = 0 g ? low ? ? transient protection characteristics supply zener voltage v z i cc = 9 ma, t a = 25c 28 ? ? v supply zener current 5 i z v s = 28 v ? ? 9.0 ma reverse-battery current i rcc v rcc = ?18 v, t j < t j(max) ? 2 15 ma continued on the next page...
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 5 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com magnetic characteristics 6 operate point: b > b op b op(a) , b op(b) ? 7 30 g release point: b < b rp b rp(a) , b rp(b) ?30 ?7 ? g hysteresis: b op(a) ? b rp(a) , b op(b) ? b rp(b) b hys(a) , b hys(b) 51435 g symmetry: channel a, channel b, b op(a) + b rp(a) , b op(b) + b rp(b) sym a , sym b ?35 ? 35 g operate symmetry: b op(a) ? b op(b) sym ab(op) ?25 ? 25 g release symmetry: b rp(a) ? b rp(b) sym ab(rp) ?25 ? 25 g 1 1 g (gauss) = 0.1 mt (millitesla). 2 when operating at maximum voltage, never exceed maximum junction temperature, t j (max). refer to power derating curve charts. 3 device will survive the current level speci ed, but operation within magnetic speci cation cannot be guaranteed. 4 short circuit of the output to vcc is protected for the time duration speci ed. 5 maximum speci cation limit is equivalent to i cc(max) + 3 ma. 6 magnetic ux density, b, is indicated as a negative value for north-polarity magnetic elds, and as a positive value for south-polarity magnetic elds. this so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the eld is indicated by the absolute value of b, and the sign indicates the polarity of the eld (for example, a ?100 g eld and a 100 g eld have equivalent strength, but opposite polarity). operating characteristics (continued) valid over operating temperature ranges unless otherwise noted; typical data applies to v cc = 12 v, and t a = 25oc characteristic symbol test conditions min. typ. max. unit 1 emc contact allegro microsystems for emc performance.
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 6 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com thermal characteristics may require derating at maximum conditions, see application information characteristic symbol test conditions* value units package thermal resistance r ja package k, 1-layer pcb with copper limited to solder pads 177 oc/w package l-8 pin, 1-layer pcb with copper limited to solder pads 140 oc/w package l-8 pin, 4-layer pcb based on jedec standard 80 oc/w *additional thermal data available on the allegro web site. 6 7 8 9 2 3 4 5 10 11 12 13 14 15 16 17 18 19 20 20 40 60 80 100 120 180 140 160 temperature (oc) maximum allowable v cc (v) power derating curve (r ja = 140 oc/w) package l, 1-layer pcb (r ja = 177 oc/w) package k, 1-layer pcb (r ja = 80 oc/w) package l, 4-layer pcb v cc(min) v cc(max) 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 20 40 60 80 100 120 140 160 180 temperature, t a (c) power dissipation, p d (m w) power dissipation versus temperature (r ja = 140 oc/w) package l, 1 - layer pcb (r ja = 17 7 oc/w) pac kage k, 1-lay er pcb ( r ja = 8 0 oc/w) p ackage l, 4-layer pcb
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 7 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com electrical operating characteristics 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0 5 10 15 20 -40 25 150 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 -50 0 50 100 150 200 3.3 12 18 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0 5 10 15 20 -40 25 150 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 -50 0 50 100 150 200 3.3 12 18 0 50 100 150 200 250 300 350 400 450 500 -50 0 50 100 150 200 3.3 12 18 3.3 12 18 i cc(off) i cc(on) i cc(off) i cc(on) current (ma) current (ma) v cc (v) t a (c) v cc (v) t a (c) ch. a ch. b v cc (v) v cc (v) temperature ( c) v output(on) current (ma) current (ma) v cc (v) voltage (mv) temperature ( c) temperature ( c)
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 8 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 5.0 10.0 15.0 20.0 25.0 30.0 35.0 0 5 10 15 20 -40 25 150 -40 25 150 5.0 10.0 15.0 20.0 25.0 30.0 35.0 -50 0 50 100 150 200 -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 -50 0 50 100 150 200 -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 0 5 10 15 20 -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 -50 0 50 100 150 200 -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 0 5 10 15 20 t a (c) t a (c) -40 25 150 -40 25 150 b op b rp -40 25 150 -40 25 150 3.3 18 3.3 18 b op b rp v cc (v) 3.3 18 3.3 18 b op b rp v cc (v) 3.3 18 3.3 18 b op b rp v cc (v) b op b rp t a (c) ch. a ch. b temperature ( o c) v cc (v) temperature ( o c) channel a, b op and b rp switchpoint (g) v cc (v) switchpoint (g) channel b, b op and b rp channel b, b op and b rp switchpoint (g) switchpoint (g) channels a and b, b hys(a) and b hys(b) channels a and b, b hys(a) and b hys(b) b op - b rp (g) b op - b rp (g) v cc (v) temperature ( o c) channel a, b op and b rp magnetic operating characteristics additional magnetic characteristics on next page
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 9 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com magnetic operating characteristics additional magnetic characteristics on next page -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0 25.0 0 5 10 15 20 -40 25 150 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0 25.0 -50 0 50 100 150 200 3.3 18 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0 25.0 0 5 10 15 20 -40 25 150 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0 25.0 -50 0 50 100 150 200 3.3 18 v cc (v) t a (c) v cc (v) t a (c) v cc (v) temperature ( o c) v cc (v) temperature ( o c) b op symmetry, sym ab(op) b rp symmetry, sym ab(rp) b op symmetry, sym ab(op) b rp symmetry, sym ab(rp) ch. a - ch. b (g) ch. a - ch. b (g) ch. a - ch. b (g) ch. a - ch. b (g)
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 10 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com magnetic operating characteristics -35.0 -25.0 -15.0 -5.0 5.0 15.0 25.0 35.0 -50 0 50 100 150 200 3.3 18 -35.0 -25.0 -15.0 -5.0 5.0 15.0 25.0 35.0 0 5 10 15 20 -40 25 150 -35.0 -25.0 -15.0 -5.0 5.0 15.0 25.0 35.0 -50 0 50 100 150 200 3.3 18 -35.0 -25.0 -15.0 -5.0 5.0 15.0 25.0 35.0 -40 25 150 0 5 10 15 20 t a (c) v cc (v) t a (c) v cc (v) v cc (v) temperature (c) channel a symmetry, sym a channel b symmetry, sym b channel a symmetry, sym a channel b symmetry, sym b v cc (v) b op + b rp (g) b op + b rp (g) b op + b rp (g) b op + b rp (g) temperature (c)
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 11 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com functional description chopper-stabilized technique a limiting factor for switchpoint accuracy when using hall effect technology is the small signal voltage developed across the hall plate. this voltage is proportionally small relative to the offset that can be produced at the output of the hall ic. this makes it dif cult to process the signal and maintain an accurate, reliable output over the speci ed temperature and voltage range. chopper-stabilization is a unique approach used to minimize hall offset on the chip. the allegro patented technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package stress. this offset reduction technique is based on a signal modulation-demodula- tion process. the undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. the subsequent demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at baseband while the dc offset becomes a high frequency signal. then, using a low-pass lter the signal passes while the modulated dc offset is suppressed. allegro?s new innovative chopper-stabilization technique uses a high frequency clock. this chopper-stabilization approach de- sensitizes the ic to temperature and stress. the high-frequency operation also allows a greater sampling rate that produces higher accuracy and faster signal processing capability. additionally, ltering is more effective and results in a lower noise analog signal at the input to the schmitt trigger. therefore, this high- frequency chopping technique reduces jitter, also known as 360 repeatability, can be induced on the output signal. the sample- and-hold process, used by the demodulator to store and recover the signal, can slightly degrade the signal to noise ratio. this is because the process generates replicas of the noise spectrum at the baseband, causing a decrease in jitter performance. however, the improvement in switchpoint performance, resulting from the reduc- tion of the effects of thermal and mechanical stress, outweighs the degradation in the signal to noise ratio. this technique produces devices that have an extremely stable quiescent hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. this technique is made possible through the use of a bicmos process which allows the use of low offset and low noise ampli ers in combination with high-density logic integration and sample and hold circuits. chopper stabilization circuit (dynamic quadrature offset cancellation) amp regulator low- pass filter sample and hold
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 12 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com channel a m agnetic field at hall element e1 channel a output signal at outputa channel b output signal at outputb channel b m agnetic field at hall element e2 typical applications operation quadrature output signal con guration. the outputs of the two output channels have a phase difference of 90o when used with a properly designed magnet that has an optimal pole pitch of twice the hall element spacing of 1.0 mm. b op b rp b hys v output(off) v output v output(on)(sat) switch to low switch to high b+ v+ output voltage in relation to magnetic ux density received. output on each channel independently follows the same pattern of transition through b op followed by transition through b rp .
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 13 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com regulated supply 1 A1230 2 3 4 v supply 0.1 f v outputb v outputa outputa outputb gnd vcc 100 7 a a resistor is optional and is likely not needed for 12 v or 40 v clamped systems 0.1 f 100 7 1 A1230 2 3 4 v supply v outputb v outputa outputa outputb gnd vcc this device requires minimal protection circuitry during operation with a low-voltage regulated line. the on-chip voltage regulator provides immunity to power supply variations between 3.3 and 18 v. because the device has open-drain outputs, pull-up resistors must be included. if protection against coupled and injected noise is required, then a simple low-pass lter on the supply (rc) and a ltering capacitor on each of the outputs may also be needed, as shown in the unregulated supply diagram. for applications in which the device receives its power from unregulated sources, such as a car battery, full protection is generally required to protect the device against supply-side transients. speci cations for such transients vary for each application, so the design of the protection circuit should be optimized for each application. for example, the circuit shown in the unregulated supply diagram includes a zener diode that offers high voltage load-dump protection and noise ltering by means of a series resistor and capacitor. in addition, it includes a series diode that protects against high-volt- age reverse battery conditions. unregulated supply typical applications circuits
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 14 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com the device must be operated below the maximum junction temperature of the device, t j (max) . under certain combina- tions of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. this section presents a procedure for correlating factors affecting operating t j . (thermal data is also available on the allegro microsystems web site.) the package thermal resistance, r ? ja , is a gure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. its primary component is the effective thermal conductivity, k, of the printed circuit board, including adjacent devices and traces. radiation from the die through the device case, r ? jc , is relatively small component of r ? ja . ambient air temperature, t a , and air motion are signi cant external factors, damped by overmolding. the effect of varying power levels (power dissipation, p d ), can be estimated. the following formulas represent the fundamental relationships used to estimate t j , at p d . p d = v in i in (1) ??? ? t = p d r ? ja (2) t j = t a + t (3) for example, given common conditions such as: t a = 25c, v cc = 12 v, i cc = 4 ma, and r ? ja = 140 c/w, then: p d = v cc i cc = 12 v 4 ma = 48 mw ?? t = p d r ? ja = 48 mw 140 c/w = 7c t j = t a + ? t = 25c + 7c = 32c a worst-case estimate, p d (max) , represents the maximum allow- able power level, without exceeding t j (max) , at a selected r ? ja and t a . example : reliability for v cc at t a = 150c, package l, using a single-layer pcb. observe the worst-case ratings for the device, speci cally: r ? ja = 140c/w, t j (max) = 165c, v cc (max) = 18 v, and i cc (max) = 6 ma. calculate the maximum allowable power level, p d (max) . first, invert equation 3: ? t max = t j (max) ? t a = 165 c ? 150 c = 15 c this provides the allowable increase to t j resulting from internal power dissipation. then, invert equation 2: ???? p d (max) = ? t max r ? ja = 15c 140c/w = 107 mw finally, invert equation 1 with respect to voltage: v cc (est) = p d (max) i cc (max) = 107 mw 6 ma = 18 v the result indicates that, at t a , the application and device can dissipate adequate amounts of heat at voltages v cc (est) . compare v cc (est) to v cc (max) . if v cc (est) v cc (max) , then reliable operation between v cc (est) and v cc (max) requires enhanced r ? ja . if v cc (est) v cc (max) , then operation between v cc (est) and v cc (max) is reliable under these condi- tions. power derating
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 15 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com package k, 4-pin sip 24 3 1 e1 e2 2.10 1.00 0.84 ref 1.27 nom 2.16 max 0.51 ref 45 45 c hall elements (e1 and e2); not to scale b 1.32 gate and tie bar burr area a b c dambar removal protrusion (8x) a d e e e e d active area depth, 0.43 mm ref for reference only; not for tooling use (reference dwg-9010) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown standard branding reference view n = device part number y = last two digits of year of manufacture w = week of manufacture mold ejector pin indent branded face yyww nnnn 1 5.21 +0.08 ?0.05 0.38 +0.06 ?0.03 3.43 +0.08 ?0.05 0.41 +0.07 ?0.05 14.73 0.51 1.55 0.05 branding scale and appearance at supplier discretion
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 16 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com c seating plane 2 1 2 1 8 1.27 bsc gauge plane seating plane a terminal #1 mark area b reference land pattern layout (reference ipc7351 soic127p600x175-8m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances pcb layout reference view b c active area depth, 0.40 mm ref d c a b branding scale and appearance at supplier discretion c 0.65 1.27 5.60 1.75 c 0.10 8x 0.25 bsc 1.04 ref for reference only; not for tooling use (reference dwg-9204) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown 4.90 0.10 3.90 0.10 0.41 0.10 6.00 0.20 0.21 0.04 0.84 +0.43 ?0.44 8 0 0.15 +0.10 ?0.05 1.62 +0.13 ?0.27 standard branding reference view nnnnnnn llll 1 n = device part number = supplier emblem y = last two digits of year of manufacture w = week of manufacture l = lot number yyww 8 1.95 1.00 1.95 d d d e1 e2 package l, 8-pin soicn
ultra-sensitive dual-channel quadrature hall-effect bipolar switch A1230 17 allegro microsystems, inc. 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com copyright ?2010-2012, allegro microsystems, inc. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com revision history revision revision date description of revision rev. 1 july 9, 2012 update regulator description

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